NEWS & EVENTS > NEWS > ARCHIEVE 2022
2022.12.27
STAr Technologies Announces the PoWoS Trademark Registration
STAr Technologies, a leading semiconductor test probe card manufacturer, is pleased to announce that its trademark application for “PoWoS”, Probe-on-Wafer-on-Substrate, has been approved by Taiwan Intellectual Property Office (TIPO), and the registration process is completed. The trademark covers the following product and service category: "Probe, test probe card, IC tester, mixed IC tester, IC tester manufacture/service, development of test software, and test consultant services, etc."
The PoWoS is technology based on multiple pending patents on probe cards, interfaces and tests, that incorporate wafer-level tests of advanced nanometer technology nodes semiconductor ICs. Probe cards are complex system that incorporates many advanced parts that is critical in semiconductor wafer-level tests process required to ensure high stability to achieve accurate test results and with extended lifetime to reduce COT (cost-of-test). STAr Technologies focuses on the interface and assembly technologies which efficiently enhances probe card performances and lower cost-of-ownership. The approval of PoWoS trademark provides essential layer of protection for the future technology developments and applications of STAr’s probe cards.
“We are pleased that the Intellectual Property Office has approved our registration application and believe our probe card solution are ideal for industry customers. STAr has placed a value on the intellectual property and been underling the corporate commitment to protect its innovation and technology for future growth,” said Dr. Choon-Leong LOU, CEO&CTO of STAr Technologies, Inc.
About STAr Technologies
2022 marks the 21st anniversary, STAr now is the leading supplier of WAT and CIS probe card and has continuously improved the technologies, lead time and cost-ownership for the customers. Headquartered in Hsinchu, Taiwan, STAr and has branches out to USA, Japan, Singapore, South Korea and China. For more information go to www.STAr-Quest.com
STAr Technologies’ Trademark of “PoWoS” (Probe-on-Wafer-on-Substrate)
2022.11.28
High Throughput Micro-LED Test Probe and Solution
With more and more mature technology for Mini- and Micro-LEDs fabrication, manufacturers are gearing up for the production phase and critically looking for more test efficiency and fast testing for the optical devices. STAr Technologies, as the leading Mini- and Micro-LEDs tester supplier continuously develops measurement technology to enhance optical testing capabilities and parallel test efficiency and to achieve cost-effective high-volume production.
STAr's Unicorn-LAIT II tester is designed to meet diverse industry requirements and to ensure accurate and reliable measurement results in the shortest amount of test time, based on an integrated parallel test architecture. The tester is ideal for electrical, optical measurement, driver functionality, RGB testing, etc. The tester is equipped with high efficient Dark and EMI Shield test environment dedicated to LED and Laser Applications. The system can be upgradeable with an autoloader for a fully automatic test with a cassette.
STAr's Unicorn Mini- and Micro LEDs tester is based on a flexible architecture platform supporting small pads probing with controlled needle force. The Mini- and Micro LEDs tester integrates parallel testing with a probe station, and probe card and offers comprehensive analysis results to industry users. Unicorn Mini- and Micro LEDs tester efficiently accomplishes manufacturers' expectations for high throughput production to meet their customer's assembly requirements.
“To Mini- and Micro-LEDs manufacturers, test time and the reliable result are the key factors for product strategy. Unicorn-LAIT II is a high throughput tester to cater for dies in hundreds of thousands to millions of optical devices per wafer and allows industry users to significantly reduce the cost of testing,” said Dr. ChoonLeong LOU, CEO& CTO of STAr Technologies.
STAr Unicorn-LAIT II Tester Equipped EMI Shielded Test Environment
2022.08.30
STAr Technologies and CompoundTek Jointly Developed the Most Advanced Silicon Photonics Wafer-Level Tester
Hsinchu, Taiwan - STAr Technologies, the leading supplier for Silicon Photonics test system, announced a collaborative achievement with CompoundTek, the global foundry service provider, in the successful co-development of Silicon Photonics (SiPh) Wafer Test system with automatic fiber array block edge coupling. This advanced solution is addressing the test challenges for wafer-level test with time reduction in setup and alignment and lower test cost than other test systems.
With Silicon Photonics technology is used in a wide range of applications, SiPh product companies and manufacturers face new engineering and high-volume manufacturing challenges in wafer-level testing of SiPh devices and most companies either use vertical grating coupler during wafer test or only test after the SiPh test is assembled and packaged. However, skipping the wafer test totally will cause an overall cost of products increase as SiPh KGD cannot be identified before assembling with other dies.
To address the SiPh wafer test needs, STAr Technologies and CompoundTek co-developed the SiPh wafer test solution which is the only SiPh test system enables to support edge coupling fiber array automatically to SiPh ICs with width smaller than 100um and accuracy and repeatability down to 0.1um. Through patent-pending fiber alignment test kits and pattern recognition software, the test fibers can deflect the light at about 90 degrees into the edge coupler with low optical power insertion loss and extremely low light reflection.
Dr. Choon-Leong Lou, CEO & CTO of STAr Technologies, commented, "This solution makes a new milestone for SiPh wafer-level testing up to 50 percent reduction in setup and alignment test time while keeping 40 percent lower cost than other tester options in the market. It exactly meets manufacturer's needs for both vertical and edge coupling with a reliable result and cost-effective test system for high-volume production."
2022.08.24
STAr Technologies Launched the A Star is Born program to provide Scholarships and Bursaries for Primary School Students in Taiwan Miaoli County
On the morning of August 24 Taiwan Miaoli County government together with STAr Technologies kick-start the "A STAr is Born" bursaries and scholarships for primary school students in Miaoli County. Miaoli County Magistrate Mr. Yao-Chang Hsu and Director of Education Ministry Ms. Shin-Hui Yeh are joined with STAr Technologies' Chairman Dr. Choon-Leong Lou to announce the official launch of this program from 2022 academic year. This program comprises of annual donation of more than NT$4 million yearly with monthly bursaries and semester scholarships to all primary schools in Miaoli County.
STAr Technologies is one of the top suppliers of semiconductor test systems and probe cards in Taiwan. The "A STAr is Born" program provides bursaries to financially needy students ensuring that each can fulfill their ambitions to carve out a successful future with carefree schooling. Dr. Lou recognizes that success requires more than just a one-time financial contribution and has therefore built a long-term multi-year program that includes monthly stipends for students in remote rural primary schools.
In this program, STAr Technologies will also provide scholarships to students with outstanding academic achievements to encourage and inspire them. This scholarship presents a wonderful opportunity to expand educational resources available for our young generations and grooming them to be future leaders of the community.
Dr. Lou has himself benefited from bursary and scholarship in his early days and recognizes the importance of talent cultivation starting from primary education. Dr. Lou stressed that "With the success of STAr, it is only right to give back to society. I hoped that this "A Star is Born" program can give births to many newborn stars for the community."
Mr. Hsu gratefully said "we always encourage successful enterprises to contribute to society. I would like to thank STAr Technologies for this charitable deed in providing Miaoli county's children with continuous multi-year bursaries and scholarships. With this program, we can reduce the financial loading of parents and promoting education in children."
With "A STAr is Born" program, the Education Ministry of Miaoli County will assist the 119 primary schools (including branches) in qualifying students for bursaries and scholarships from the 2022 academic year.
2022.07.26
STAr Technologies Releases New Test Software for Advanced Wafer-Level Reliability Qualification
Hsinchu, Taiwan - STAr Technologies, a provider of semiconductor test solutions, releases new Sagittarius-WLR integrated platform for advanced Wafer-Level Reliability (WLR) test. Sagittarius-WLR is developed to address new device reliability qualification needs for advanced nanometer node technologies. More than 30 tests algorithms are newly developed or revised to meet advanced reliability qualifications to include ultra-fast NBTI/PBTI, HCI, GOI/TDDB, isothermal electromigration, etc. Sagittarius-WLR is one of the most comprehensive all-encompassing software for fast, predictive, and qualified solutions for advanced technology nodes semiconductor device reliability qualification.
The Sagittarius-WLR covers most of critical reliability test requirements and features parallel multi-device and multi-tester operation to reduce qualification time. With dynamic parallel execution mode, users can concurrently run multiple devices to reduce qualification time by stressing and testing devices in parallel. At the same time, the multi-tester operation mode allows independent and maximum of 32 virtual testers running tests in parallel under one hardware configuration. This flexibility will enable all kinds of test splits and dynamic test selection with parallel automated test operations.
Furthermore, Sagittarius-WLR is designed with functions that allows users to have efficient reliability with real time display of Pass/Fail judgement and test data. This test system can further be applied for electrical process-control monitoring (PCM), reliability monitoring and reliability qualification. The system data will simultaneously be stored in file management system as raw data in office CSV or any user defined format locally or in the cloud for online data analysis with software tools provided. Hundreds of copies of Sagittarius-WLR has been installed and all can be upgraded with the new capabilities and can successfully improves reliability qualification efficiency and increases throughput.
Yu-Ming Chien, President of STAr Technologies test business group, comments on this high value test system, "STAr is devoted to the development of semiconductor reliability test for decades and continues to provide solutions that enhance measurement efficiency and accuracy. Sagittarius-WLR is the best integrated test platform and indeed improve reliability qualification efficiency and proven track records with installations covering all the top foundries."
2022.07.13
STAr Technologies Announces the Sale of Accel-RF HTOL Burn-In Systems to Top Taiwan Semiconductor Foundries
Hsinchu, Taiwan - STAr Technologies, a leading supplier of semiconductor reliability test systems, today announces the sale of Accel-RF HTOL Burn-In test systems to top semiconductor foundries in Taiwan. Accel-RF Instruments Corp., a STAr Technologies Group company, located in San Diego, U.S.A. and specializing in turn-key RF reliability and performance characterization test solutions for compound semiconductors, provides this HTOL burn-in reliability test solution.
With industries driving increased complexity in RF systems, more components and devices are becoming part of the RF block diagram. To ensure complete system reliability, the qualification of critical components subject to high RF drive when in use is needed. Accel-RF, the world leader in the design and manufacture of RF reliability test systems, designed the RF-Biased Burn-In system with modular architecture and a high channel-capacity, expandable tray design, to provide the flexibility to qualify multiple device types within a small rack footprint. The system boasts a range of DC bias supply options, from high resolution/low power supplies for small devices including GaAs HBT and SiGe, to options for high power RF devices including GaN and LDMOS, etc.
The RF-Biased HTOL Burn-In system configuration has all power supply control units and PCU modules embedded and controlled through the LIFETEST software and system controller. Auto-Bias features for gate/base and drain/collector levels, and on/off sequencing are programmable in the PCU setup. Each channel or DUT is independently sourced and controlled in this platform architecture. All temperature setting and control is achieved through the LIFETEST software and temperature monitoring is done independently and individually per DUT channel.
"The RF-Bias Burn-In reliability system addresses growing industry test requirements and enables manufacturers to collect the reliability data their customers demand, ensuring early adoption of their devices to the marketplace," Roland Shaw, president of Accel-RF commented. "The sale of our RF reliability systems to Taiwan's top foundries reflects our ability to stay on the cutting edge of semiconductor test technology, and shows that we have been recognized by the global semiconductor industry."
Yu-Ming Chien, President of STAr Technologies test business group said, "Innovation is at the core of our corporate philosophy. The RF-Biased Burn-In reliability system diversifies and enhances our range of products, solutions and services. STAr Technologies will continue being committed to providing effective solutions to meet customers' test needs now and in the future."
Accel-RF Biased HTOL Burn-In System for RF devices
2022.06.16
STAr Technologies and World Leading Foundry Collaborate to Complete the Development of Fine Pitch Probe Cards for Pre-Bumped Wafer Tests
Singapore - STAr Technologies, the leading semiconductor test probe card manufacturer, announced a collaborative achievement with one of world leading foundries in the successful development of fine pitch MEMS pre-bump probe cards for pre-bumped wafer test and reliability qualification. These probe cards and with probe heads assembled on the same probe cards PCBs and space transformers as bumped test probe cards, further reducing the cost of pre-bumped wafer sort. This technology shortens early-stage process technology yield ramp and enables faster time to high-volume-production to address the growing global chip demand in the semiconductor industry.
To a wafer foundry, engineering wafers present a wealth of process improvement opportunities that are often not harvested because of additional bumping cost and production wafers test priorities. The over reliance on bump probing becomes a bottleneck to accelerate yield learning. In this joint project, STAr Technologies and the world leading foundry overcome this gridlock by reverse engineering a bump probe card assembly to include pre-bump probing flexibility. This solution does not require sensitive product information to be shared by design houses and saves cost and time to qualification.
Dr. Jeffrey Lam, GM & VP Engineering of STAr Technologies said, "Semiconductor test holds the key to manufacturing excellence. Both volume and quality test is essential to ensure on-time mass production. We are glad to overcome the challenges of enabling pre-bump probing in FAB by leveraging our probe block interposer (PBI) and redistribution (RDL) routing MEMS probe technology to build a fine-pitch probe head for multisite wafer test."
STAr Aries Optima MEMS Fine Pitch Probe Card and Sideview of the MEMS Pointed Needles
2022.05.19
STAr Technologies Unveils One-Touch Memory Test Probe Card
Hsinchu, Taiwan - STAr Technologies, a leading supplier of semiconductor test probe card, unveils a new one-touch Aries-Prima Memory Test probe card. The probe card is designed specifically to meet the current high speed and precision test requirement that is applicable for highly parallel large array multi-DUT Memory devices to increase productivity with reduced cost-of-test. Aries-Prima at its extreme, is used for "one-touch" Memory IC tests, at which only one touch-down contact is required for testing the whole 300mm wafer.
Driven by the market uptrend for AI, AR, VR, and cloud services which drive IT infrastructure and the explosive growth of computing memory and power. With such increasing demands, our industry customers need to increase wafer-level test efficiency with the lowest possible probe card cost, which is one of the highest test consumable expenditures. To meet these requirements, STAr has been developing MEMS probe technologies for years and launched the high-value MEMS probe cards to the test market this year.
The Aries-Prima series MEMS probe card is designed for interfacing both DRAM and FLASH Memory ICs wafers to ATE for large array multi-DUT tests. Aries-Prima enables wide temperature range, from -40degC to 150degC, wafer-level tests with "one-touch" capabilities for 300mm wafers. This is achieved with stable probe contact up to 120um over-drive from first contact and coefficient of thermal expansion (CTE) equivalent to that of silicon wafers.
In addition, STAr enhances the physical characteristics of 3D MEMS probes for extended probe contact lifetimes. With maximum of 100,000 pins, up to 1536 DUTs in parallel, and minimum pitch down to 50um, Aries-Prima provides reliable measurement data with testing speed up to 3.2Gbps for leading Memory ICs.
"STAr is devoted to MEMS probe technology development and is eager to bring customers great test experiences for now and in the future. Aries-Prima is another achievement for one-touch memory test probe card technology. We believe the revolutionary structure and probe properties will dramatically improve capability achieving lower cost-of-tests," said Dr. Choon-Leong Lou, CEO & CTO of STAr Technologies, Inc.
STAr Aries-Prima One-Touch Memory Test Probe Card
2022.04.26
STAr Technologies reintroduce UNICORN-LAIT II Parallel Micro-LED Tester
Hsinchu, Taiwan - With Micro-LED moving from Engineering to Production, a near-zero tolerance for bad pixel, ultra-small pitch probing, automatic electrical and optical measurement systems need to step up. With STAr's enhanced Unicorn-LAIT II addresses these stricter testing requirements and with its unique parallel test architecture for electrical, driver functionality, RGB, optical testing capabilities.
Unicorn-LAIT II is an advanced high throughput LED test system, that caters for dies in hundreds of thousands to millions of LED per wafer. High Parallelization allows the customer to significantly reduce the Cost of Test and Test Time. The system provides critical measurements for Mini/Micro-LEDs and integrates parallel testing with the electrical, optical measurement with probe station and probe cards in one system, offering a comprehensive analysis result to industry users.
Unicorn-LAIT II series is an advanced system that integrates parallel test instruments to a whole new level in both semiautomatic and fully automatic probe station options. Based on STAr Unicorn-LPX precision SMUs with 48 and up to 480 channels, this new model provides a high-speed and accurate DC of optical characterization of each Micro-LED. The probe station with high-precision closed-loop XYZ stages with 0.1um Laser encoder feedback ensures the best repeatability in multi-LED stepping <5um pad size.
With STAr's MicroLED-MD test probe card, STAr Unicorn-LAIT II enables wide varying probe layout configuration for accurate multi-DUT probing and ensures current contact height with "Multi-Edge Sensing" capabilities. Moreover, users can easily and efficiently set up and control the whole measurement process with software upgrade and achieve the best test performance.
“With STAr's enhanced Unicorn-LATI II is another option for Mini- and Micro- LED industry customers and significantly reduce the cost of test and test time. The system provides critical measurements and surely will bring the users a great measurement and test experiences in the further,” said ChoonLeong Lou, CEO & CTO of STAr Technologies.
Unicorn Parallel Optical Measurement
2022.03.24
STAr Technologies Completes Order for All-in-One Dynamic High Current & Voltage Reliability Test System
Hsinchu, Taiwan - STAr Technologies, a leading supplier of semiconductor reliability test systems, announced the shipment of the all-in-one SMU-per-pin test system, the STAr Pluto-hiVIP, to benchmark the semiconductor test reliability system industry. The system is configured for low/high current dynamic AC electromigration and burn-in testing for high pin count devices such as TSV, copper-pillar, micro-bump, etc, and also high voltage, high power HCI & NBTI HCI/NBTI & high voltage GOI reliability tests.
The STAr Pluto Series system is the next generation reliability test solution for both package-level and wafer-level qualification and supports a wide range of configurations to meet industry testing requirements for EM, HCI, NBTI, TDDB, etc. The new STAr Pluto-hiVIP model of the Pluto Series is an advanced high-current & high-voltage test system with flexible architecture that can be easily upgraded to a high-capacity system to support multiple applications within one system.
The maximum configuration comprises 48 Source-Measurement Unit (SMU) modules, each with dual independent sources. A total of 96 sources allows high DUT count to achieve greater qualification test performance and significantly increases the capacity for high-current and high-voltage reliability tests.
STAr Pluto hiVIP is a complete, integrated package-level and high temperature reliability test solution designed to support high-current EM, high-power HCI/BTI and high-voltage TDDB qualification. The system is designed for parallel stressing and testing, supporting up to a max of 4.0A DC, and high breakdown voltage of up to 100V. With thermal chambers ranging from 18C to 400C, with DUT board equipped with zero-insertion-force sockets ensures complete set of environments suitable for the full suite of reliability tests from room temperature HCI to high temperature EM tests within a single system. Pluto hiVIP system is ensured to main high precision test result and qualification performance.
“This shipment validates the STAr Pluto family extraordinary capabilities, efficiency and test accuracy recognized by industry customers. The Pluto Series system is based on new hardware and software architecture to address today and future’s semiconductor qualification test requirements and reduces engineering efforts to support customers achieve the best test performance and higher capacity,” said ChoonLeong Lou, CEO & CTO of STAr Technologies.
STAr Pluto-hiVIP System